Advances in fabrication techniques for integrated circuits and consumer demand for more powerful and feature-rich electronic devices have driven the evolution of integrated circuits over the past several decades. An observation that the number of transistors in integrated circuits doubles approximately every two years is known as Moore's law. As the number of transistors within an integrated circuit increases, so must the number of conductive pathways that interconnect them and link them with other elements in the integrated circuit. Traditionally, interconnects within integrated circuits were formed by the subtractive etching of aluminum patterned by a photoresist process. With the decreasing size and increasing performance of integrated circuits, a transition from aluminum to copper was made in the early 1990s for the metal used to form interconnects. Copper is a better conductor than aluminum, allowing for thinner interconnects that are less prone to Joule heating. Copper also has a greater thermal conductivity than aluminum, providing more efficient heat conduction paths.
A lack of volatile compounds for copper does not allow it to be patterned by the subtractive techniques used for aluminum. Instead, copper interconnects within integrated circuits are patterned in an additive way using a dual-damascene process that involves etching a dielectric material, such as silicon dioxide, and filling the resulting patterned trenches and holes with copper. A barrier layer is used to surround the copper interconnects to prevent metal from diffusing into the surrounding dielectric and degrading the performance of the semiconductor. Silicon, for example, forms deep-level traps when doped with copper, and copper migrates easily in silicon dioxide.
Currently, interconnects have shrunk to the point where, despite the use of copper, difficulties are presenting themselves. One such difficulty is electromigration, an undesired process by which metal atoms within an interconnect are dislodged and displaced by an electric current. Particularly at the barrier layers, displaced copper atoms create regions of tensile and compressive stress that depend on current levels and directions. Tensile stress causes voiding, which eventually breaks the conduction pathway of an interconnect, and compressive stress causes hillocking, which eventually causes the interconnect to short circuit. With higher current densities that result from making interconnects with smaller cross-sectional areas, the effects of electromigration increase.
The present disclosure is illustrated by way of example, as reflected in one or more disclosed embodiments, and is not limited by the accompanying figures, in which like reference numbers indicate similar elements. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to the dimensions of other elements to help to improve understanding of embodiments, disclosed or otherwise, of the present disclosure.
The apparatus and method components have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the embodiments of the present disclosure so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein. Also, the functions included in the flow diagrams do not imply a required order of performing the functionality contained therein.